SNIP_CLASSIC_PLATFORM_SECTION_7_3_1_Bit_Ordering_Register

7.3.1 Bit Ordering (Register) [SWS_Platform_00048] Upstream requirements: SRS_BSW_00161 ⌈In case of Big Endian bit ordering CPU_BIT_ORDER shall be assigned to MSB_FIRST in the platform types header file.⌋ [SWS_Platform_00049] Upstream requirements: SRS_BSW_00161 ⌈In case of Little Endian bit ordering CPU_BIT_ORDER shall be assigned to LSB_FIRST in the platform types header file.⌋ Figure 7.1: Big Endian bit ordering versus Little Endian bit ordering Important Note: The naming convention Bit0, Bit1, etc. and the bit’s significance within a byte, word, etc. are different topics and shall not be mixed. The counting scheme of bits in Motorola[4] µC-architecture’s (Big Endian Bit Order) starts with Bit0 indicating the Most Significant Bit, whereas all other µC using Little Endian Bit Order assign Bit0 to be the Least Significant Bit! The MSB in an accumulator is always stored as the left-most bit regardless of the CPU type. Hence, Big and Little Endianess bit orders imply different bit-naming conventions.