SNIP_CLASSIC_PLATFORM_SECTION_7_3_2_Byte_Ordering_Memory

7.3.2 Byte Ordering (Memory) [SWS_Platform_00050] Upstream requirements: SRS_BSW_00161 ⌈In case of Big Endian byte ordering CPU_BYTE_ORDER shall be assigned to HIGH_ BYTE_FIRST in the platform types header file.⌋ Figure 7.2: Big Endian (HIGH_BYTE_FIRST) byte ordering Address Data Order n Byte1 Most Significant Byte ( HIGH_BYTE_FIRST) n+1 Byte0 Least Significant Byte Table 7.1: Big Endian (HIGH_BYTE_FIRST) byte ordering [SWS_Platform_00051] Upstream requirements: SRS_BSW_00161 ⌈In case of Little Endian byte ordering CPU_BYTE_ORDER shall be assigned to LOW_ BYTE_FIRST in the platform types header file.⌋ Figure 7.3: Little Endian (LOW_BYTE_FIRST) byte ordering Address Data Order n Byte0 Least Significant Byte ( LOW_BYTE_FIRST) n+1 Byte1 Most Significant Byte Table 7.2: Little Endian (LOW_BYTE_FIRST) byte ordering Naming convention for illustration: The Most Significant Byte within a 16 bit wide data is named Byte1. The Least Significant Byte within a 16 bit wide data is named Byte0. Important Note: The naming convention Byte0 and Byte1 is not unique and may be different in the manufacturer’s reference documentation for a particular µC.